LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 284 / 882

ML62Q1000 Series User's Manual
Chapter 7 Low Speed Time Base Counter
FEUL62Q1000 7-10
7.2.5 Low Speed Time base counter frequency adjustment register (LTBADJ)
Time base counter frequency adjustment register (LTBADJ) is a specific function register (SFR) to set adjustment value
for the frequency of time base clock.
This register is available on the ML62Q1500 and ML62Q1700 group.
Address: 0xF066 (LTBADJL/LTBADJ), 0xF067 (LTBADJH)
Access: R/W
Access size: 8/16 bit
Initial value: 0x0000
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Word
LTBADJ
Byte
LTBADJH LTBADJL
Bit
- - -
LADJ
S
LADJ
11
LADJ
10
LADJ
9
LADJ
8
LADJ
7
LADJ
6
LADJ
5
LADJ
4
LADJ
3
LADJ
2
LADJ
1
LADJ
0
R/W R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial
value
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit No.
Bit symbol
name
Description
15 to
13
- Reserved bit
12 LADJS This indicates the sign of frequency adjustment value.
0: Indicates the value in LADJ11-0 is a positive number
1: Indicates the value in LADJ11-0 is a negative number
11 to 0 LADJ11 to
LADJ0
These bits are used to specify the frequency adjustment value.
See 7.3.2 "Time Base Counter Frequency Adjustment Function" for the relation of the setting
data and the adjustable ppm.