LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 660 / 882

ML62Q1000 Series User's Manual
Chapter 22 Voltage Level Supervisor
FEUL62Q1000 22-5
22.2.2 Voltage Level Supervisor 0 Control Register (VLS0CON)
VLS0CON is a special function register (SFR) used to control the VLS0(Voltage Level Supervisor).
This register is unresetable by anything other than the Power On Reset(POR) and RESETN pin reset.
Address: 0xF850 (VLS0CON)
Access: R/W
Access size: 8bit
Initial value:
0x00
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Word
-
Byte
- VLS0CON
Bit
- - - - - - - - - - - - -
VLS0R
F
VLS0F
VLS0E
N
R/W R R R R R R R R R R R R R R R/W R/W
Initial
value
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit No. Bit symbol
name
Description
7 to 3 - Reserved bit
2 VLS0RF This bit is used to indicate whether the voltage level detection result is valid or not.
This bit valid only in the supervisor mode and fixed to "0" in the single mode.
0: The VLS0 circuit is stopped or VLS0 is being stabilized (initial value)
1: The VLS0 detection result is valid (readable)
1 VLS0F This bit for monitoring the voltage level, retains the last detection result.
This bit is cleared to "0" by writing "1" to this bit, but not cleared by writing "0".
Also, this bit is cleared to "0" when the VL0 stars operating.
0: The power voltage(V
DD
) is higher than the threshold voltage (initial value)
1: The power voltage(V
DD
) is lower than the threshold voltage
0 VLS0EN This bit is used to control the VLS0 operation.
In the single mode, this bit is automatically reset to "0" after detecting the voltage level and
the VLS0 stops operating.
0: Disable operating the VLS0 (Initial value)
1: Enable operating the VLS
[Note]
Ÿ
There is a limitation in each mode for entering the STOP/STOP-D mode while the VLS0 is running.
Mode Description
The VLS0 is running in the
supervisor mode The MCU can enter the STOP/STOP-D mode only when the
VLS0RF bit is "1".
The VLS0 is running in the single
mode
The MCU is unable to enter the STOP/STOP-D mode.
Enter the STOP/STOP-D mode when the VLS0 is not running
(when the VLS0EN bit is "0").
Ÿ
Even if resets (VLS0 reset, WDT reset, ROM unused area access reset, or RAM parity error reset) other
than the POR and RESET_N pin reset occurred, the VLS0 remains running.