LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 436 / 882

ML62Q1000 Series User's Manual
Chapter 11 Serial Communication Unit
FEUL62Q1000 11-34
11.2.15 UARTn1 Status Register (UAn1STAT)
UAn1STAT is a specific function register (SFR) to indicate the state in the transmit/receive operation in UARTn1
half-duplex communication mode.
When the full-duplex communication mode is chosen, the contents of the UAn1STAT register is invalid.
Address: 0xF61A(UA01STAT), 0xF63A(UA11STAT), 0xF65A(UA21STAT), 0xF67A(UA31STAT),
0xF69A(UA41STAT), 0xF6BA(UA51STAT)
Access: R/W
Access size: 8bit
Initial value: 0x00
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Word
−
Byte
−
UAn1STAT
Bit
− − − − − − − − − −
Un1R
XF
Un1T
XF
Un1F
UL
Un1P
ER
Un1O
ER
Un1F
ER
R/W
R R R R R R R R R R R R R/W R/W R/W R/W
Initial
value
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit no.
Bit symbol
name
Description
5 Un1RXF This bit is used to indicate the UART1 is receiving data in UARTn1 half-duplex
communication mode.
0: Date reception is stopped (initial value)
1: Data reception is in progress
4 Un1TXF This bit is used to indicate the UART1 is transmitting data in UARTn0 half-duplex
communication mode.
0: Data transmission is stopped (initial value)
1: Data transmission is in progress
3 Un1FUL This bit is used to indicate the state of the transmit/receive buffer in UARTn1 half-duplex
communication mode.
When the half-duplex communication mode is chosen, this bit becomes "1" when
transmission data is written to the SD0BUFH register and becomes "0" when the
transmission data is transferred to the shift register. To transmit data successively, check that
the Un1FUL bit is "0" before writing write the next transmit data to the SDn0BUFH register.
The Un1FUL bit is forcibly reset to “0” by writing “1” to this bit.
The Un1FUL bit is fixed to "0" in the receive mode.
0: No data in the SD0BUFH register (initial value)
1: There is data in the SD0BUFH register
2 Un1PER This bit is used to indicate a parity error in UARTn1 half-duplex communication mode.
The parity of the received data and the parity bit added to the data are compared and if they
do not match, this bit becomes "1" and holds “1” until it is cleared by the software.
The Un1PER bit is forcibly reset to "0" by writing “1” to this bit.
The Un1PER is fixed to "0" in the transmit mode.
0: The parity error has not occurred (initial value)
1: The parity error has occurred