LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 687 / 882

ML62Q1000 Series User's Manual
Chapter 23 Successive Approximation Type A/D Converter
FEUL62Q1000
23-11
SA-ADC Upper/Lower Limit Status Register 1 (SADULS1) 23.2.5
SAULS1 is a special function register (SFR) used to indicate whether the A/D conversion result matches to the condition
of upper/lower limit on channel 16.
Address: 0xF826(SADULS1L/SADULS1), 0xF827(SADULS1H
）
Access: R/W
Access size: 8/16bit
Initial value:
0x0000
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Word
SADULS1
Byte
SADULS1H SADULS1L
Bit
- - - - - - - - - - - - - - -
SAULS
16
R/W R R R R R R R R R R R R R R R R/W
Initial
value
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit No. Bit symbol
name
Description
15 to 1 - Reserved bit
0 SAULS16 These bits are used to indicate whether the A/D conversion results of channels 16
(temperature sensor) matches to the condition of upper/lower limit.
The results are not updated when the SALEN bit is "0".
The corresponding bits get "1" if the condition matched and holds "1" until the bits are cleared
or the LSI gets the system reset.
When using the A/D conversion result upper/lower limit detection function (SALEN=1), the
interrupt request is generated at the same time the corresponding bit gets "1". Refer to Figure
23-5 for the timing of the interrupt and updates of detection result.
The SAULS16 bit is forcibly cleared to "0" by writing 1 to this bit. The writing "0" does not
clear the bit.
0: The A/D conversion result unmatched to the condition of upper/lower limit (SALMD1
to 0) (initial value)
1: The A/D conversion result matched to the condition of upper/lower limit (SALMD1 to 0)
[Note]
Ÿ
Do not use bit access instructions and use word or byte access instructions for writing this register.
Ÿ
When using the A/D conversion result upper/lower limit detect function (SALEN bit =1), the interrupt can
be cleared by clearing the corresponding bit of SAULS16 or by resetting the LSI.
Ÿ
When performing the A/D conversion only one time (SALPEN bit =0), confirm the bit of SAULS16 is
"
0
"
before setting SARUN bit to " 1 " .
Ÿ
When performing the consecutive scan A/D conversion (SALPEN bit =1), confirm the bit of SAULS16 is
"
0
"
, before the next A/D conversion ends.