LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 611 / 882

ML62Q1000 Series User's Manual
Chapter 18 External Interrupt Function
FEUL62Q1000 18-17
18.3.4 Expanded External Interrupt Setting Flow
Figure 18-7 shows the expanded external interrupt setting flow.
Figure 18-7 External Interrupt Setting Flow
Setting Start
Set ports to the input mode in PnMODxx registers.
(xx=01, 23, 45, 67)
Enable the extended external interrupt by EEXTX bit.
EEXTX=1;
Execute the EI instruction to set the master interrupt enable flag (MIE) to "1".
Enable extended
external interrupt
Set port mode
Set detection edge
Identify extended
external interrupt
source
Interrupt
occurrence
Set a detection edge for the extended external register in
EEICON0 register.
Set sampling
Choose
"
with sampling
"
in EEIMOD0L register.
EEIMOD0L=0x0F;
Set a dividing ratio of the sampling clock in the EEIMOD1L register.
End
Clear extended
external interrupt
request
Clear QEXTX bit .
QEXTX=0;
extended external
interrupt handling
Read EEISTAT register to identify the extended external interrupt source.
Clear extended
external interrupt
Request extended
external interrupt
Write “1” to the bits in EEINTCL register to clear the extended external interrupt
source.
Write 0x80 to EEINTCH register to request the extended external
interrupt source (if other expanded external interrupts are remained, they
would be accepted to occur the interrupt again
）
.
EEINTCH=0x80;
Execute the interrupt routine.