LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 244 / 882

ML62Q1000 Series User's Manual
Chapter 5 Interrupts
FEUL62Q1000 5-48
5.3.6 How To Write Interrupt Processing When Interrupt Level Control Enabled
This section describes examples of program scripts of interrupt function when ILE of the interrupt level control enable
register (ILEN) is set to enable the interrupt level control. See "CCU8 Programming Guide" for the detailed scripting
method of and notes on interrupt processing.
5.3.6.1 Description of Interrupt Function to Disable Multiple Interrupts
To describe the interrupt function to disable multiple interrupts, specify 1 in the category field of the INTERRUPT
pragma and SWI pragma. When built-in function_EI is called in the interrupt function to disable multiple interrupts,
CCU8 displays an error.
After completion of the target interrupt processing, it is necessary to write to the CIL register and clear the highest
current interrupt request level (CILN bit) to "0". Otherwise, interrupts equivalent to or less than the current interrupt
request level is unacceptable.
Example of description
static void intr_fn_0A (void);
#pragma interrupt intr_fn_0A 0x0A 1
volatile unsigned short TM1msec;
static void intr_fn_0A (void)
{
+;
CIL = 0; /*Clear the highest current interrupt request level*/
}
When described as in the example, intr_fn_0A is handled as an interrupt processing function to disable multiple
interrupts. CCU8 outputs the assembly code as shown below.
Example of output
_intr_fn_0A :
push er0
;; +;
l er0, NEAR _TM1msec
add er0, #1
st er0, NEAR _TM1msec
;;}
;; CIL = 0;
mov r0, #00h
st r0, 0f022h
;;}
pop er0
rti