LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 317 / 882

ML62Q1000 Series User's Manual
Chapter 8 16-Bit Timer
FEUL62Q1000 8-26
8.3.2.4 About Interrupt Request in 8-Bit Timer Mode
In the 8-bit timer mode, the same interrupt requests (TMnINT) are used for the upper side 8-bit timer and the lower side
8-bit timer.
When the upper side 8-bit timer count value matches the TMHnDH register value, or lower side 8-bit timer count value
matches the TMHnDL register value, an interrupt request is generated if any interrupt request has not been generated for
neither the upper nor lower side 8-bit timer. Table 8-3 shows interrupt request generation conditions in the 8-bit timer
mode.
Table 8-3 Interrupt Request Generation Conditions in 8-Bit Timer Mode.
Condition
Interrupt request
(TMnINT)
State of timer counting
State of TMHnIS register
THnHIS THnLIS
Upper side 8-bit timer count value
matches TMHnDH register value
0 0 Generated
0 1
Not generated 1 0
1 1
Lower side 8-bit timer count value
matches TMHnDL register value
0 0 Generated
0 1
Not generated 1 0
1 1
If an 8-bit timer interrupt of the other side is generated while interrupt processing is in progress, the unprocessed
interrupt request can be generated again after resuming the main process by writing "1" to the THnIR bit of the
TMHnICL register prior to resuming the main process. Figure 8-9 shows an example of the interrupt process in the 8-bit
timer mode.
8-bit timer mode
operation start
Lower side 8-bit timer
Interrupt process
Lower side 8-bit timer
interrupt status clear
Upper side 8-bit timer
Interrupt process
Upper side 8-bit timer
interrupt status clear
Occur unhandled interrupt
requests
End
Timer interrupt
occurrence
Timer stop
THnLIC=1;
THnHIC=1;
THnIR=1;
Interrupt process
Lower side 8-bit timer
interrupt status confirmation
TMHnISL=1 ?
Yes.
No.
No.
Yes.
Upper side 8-bit timer
interrupt status confirmation
TMHnISH=1 ?
Figure 8-9 Example of Interrupt Process in 8-Bit Timer Mode