LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 194 / 882

ML62Q1000 Series User's Manual
Chapter 4 Power Management
FEUL62Q1000 4-28
4.3.8 Block Control Function
ML62Q1000 series has the block clock control function that stops clock supply for each peripheral circuit to reduce
current consumption and the block reset control function to reset each peripheral circuit.
When setting each bit of the BCKCONn registers (n=0 to 3) to "1", it stops supplying the clock to the corresponding
peripheral circuits reducing the current consumption.
When setting each bit of the BRECONn registers (n=0 to 3) to "1", it resets the corresponding peripheral circuits causing
the SFRs to be set with initial values.
Table 4-6 shows the list of peripheral circuits controllable with the block control function and control registers.
Table 4-6 List of Peripheral Circuits and Control Registers
Peripheral circuit
Block clock control function Block reset control function
Software reset
function
SFR
word symbol
SFR
bit symbol
SFR
word symbol
SFR
bit symbol
SFR
bit symbol
16-bit timer 0
BCKCON0
DCKTM0
BRECON0
RSETM0
SOFTR
*1
16-bit timer 1 DCKTM1 RSETM1
16-bit timer 2 DCKTM2 RSETM2
16-bit timer 3 DCKTM3 RSETM3
16-bit timer 4 DCKTM4 RSETM4
16-bit timer 5 DCKTM5 RSETM5
16-bit timer 6 DCKTM6 RSETM6
16-bit timer 7 DCKTM7 RSETM7
Functional timer 0
BCKCON1
DCKFTM0
BRECON1
RSEFTM0
Functional timer 1 DCKFTM1 RSEFTM1
Functional timer 2 DCKFTM2 RSEFTM2
Functional timer 3 DCKFTM3 RSEFTM3
Functional timer 4 DCKFTM4 RSEFTM4
Functional timer 5 DCKFTM5 RSEFTM5
Functional timer 6 DCKFTM6 RSEFTM6
Functional timer 7 DCKFTM7 RSEFTM7
I
2
C bus master 0 DCKI2CM0 RSEI2CM0
I
2
C bus master 1 DCKI2CM1 RSEI2CM1
I
2
C bus unit 0 DCKI2CU0 RSEI2CU0
Serial communication
unit 0
BCKCON2
DCKSU0
BRECON2
RSESU0
Serial communication
unit 1
DCKSU1 RSESU1
Serial communication
unit 2
DCKSU2 RSESU2
Serial communication
unit 3
DCKSU3 RSESU3
Serial communication
unit 4
DCKSU4 RSESU4
Serial communication
unit 5
DCKSU5 RSESU5
CRC calculator DCKCRC RSECRC
Multiplier/Divider DCKACC RSEACC
Buzzer DCKBUZ RSEBUZ
DMA controller DCKDMA RSEDMA
Successive approximation
type A/D converter
BCKCON3
DCKSAD
BRECON3
RSEADC
D/A converter DCKDAC RSEDAC
D/A converter 1 DCKDAC1 RSEDAC1
LCD driver DCKLCD RSELCD
Analogue comparator 0 DCKCMP0 RSECMP0
Analogue comparator 1 DCKCMP1 RSECMP1
*1
: SOFTR resets general-purpose ports in addition to peripheral circuits of the BRECONn register.
After the system reset is released, operation of each peripheral circuit becomes enabled.
For unused peripheral circuits, stop the clock supply by setting a bit of the BRECONn register corresponding to each
peripheral circuit to "1", then setting the corresponding bit of BCKCONn to "1".
To use the peripheral circuits, release the reset on the peripheral circuit by setting the bit of the BCKCONn register to "0",
then setting the bit of the BRECONn register to "0".
Also, setting the bit of the BRECONn register to "1" only causes a reset to occur while retaining clock supply, enabling
each peripheral circuit to be initialized.