LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 428 / 882

ML62Q1000 Series User's Manual
Chapter 11 Serial Communication Unit
FEUL62Q1000 11-26
11.2.8 UARTn0 Mode Register (UAn0MOD)
UAn0MOD is a specific function register (SFR) to set the mode in UARTn0 full-duplex communiction mode and
half-duplex communication mode.
Address: 0xF60C(UA00MODL/UA00CON), 0xF60D(UA00MODH),
0xF62C(UA10MODL/UA10MOD), 0xF62D(UA10MODH),
0xF64C(UA20MODL/UA20CON), 0xF64D(UA20MODH),
0xF66C(UA30MODL/UA30MOD), 0xF66D(UA30MODH),
0xF68C(UA40MODL/UA40CON), 0xF68D(UA40MODH),
0xF6AC(UA50MODL/UA50MOD), 0xF6AD(UA50MODH)
Access: R/W
Access size: 8/16bit
Initial value: 0x0000
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Word
UAn0MOD
Byte
UAn0MODH UAn0MODL
Bit
Un0D
IR
Un0N
EG
Un0S
TP
Un0P
T2
Un0P
T1
Un0P
T0
Un0L
G1
Un0L
G0
Un0R
SS
− − − −
Un0C
K1
Un0C
K0
Un0I
O
R/W
R/W R/W R/W R/W R/W R/W R/W R/W R/W R R R R R/W R/W R/W
Initial
value
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit no.
Bit symbol
name
Description
15 Un0DIR This bit is used to choose the communication direction in UARTn0 full-duplex and half-duplex
mode.
0: LSB first (Initial value)
1: MSB first
14 Un0NEG This bit is used to choose logic of the data output in UARTn0 full-duplex and half-duplex
mode.
0: Positive logic (Initial value)
1: Negative logic
13 Un0STP This bit is used to choose the stop bit length in UARTn0 full-duplex and half-duplex mode.
0: 1 stop bit (Initial value)
1: 2 stop bit
12 to
10 Un0PT2 to
Un0PT0
This bit is used to choose the parity bit in UARTn0 full-duplex and half-duplex mode.
000: No parity bit (initial value)
001: Odd parity
010: No parity bit
011: Even parity
100: No parity bit
101: Parity bit is fixed to "1"
110: No parity bit
111: Parity bit is fixed to "0"
9,8 Un0LG1 to
Un0LG0
This bit is used to choose the communication data length in UARTn0 full-duplex and
half-duplex mode.
00: 8-bit length (Initial value)
01: 7-bit length
10: 6-bit length
11: 5-bit length