LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 702 / 882

ML62Q1000 Series User's Manual
Chapter 23 Successive Approximation Type A/D Converter
FEUL62Q1000
23-26
Figure 23-5 shows operation waveforms when one-time A/D conversion is performed using channel 1 and 0.
Figure 23-5 Operation Waveforms of A/D Conversion (One-time Conversion)
Figure 23-6 shows the operation waveforms when the continuous A/D conversion is performed using channel 0.
Figure 23-6 Operation Waveforms of A/D Conversion (Continuous Conversion)
HSCLK/LSCLK
SARUN bit
SADINT
(SA-ADC interrupt
)
A/D converting
Conversion time Conversion time
A/D conversion
on channel 1
A/D conversion
on channel 0
Sample/hold capacitive
discharge
Sampling
Presence/absence of discharge can be chosen by SAINIT bit of SADMOD register.
It takes two clocks of SAD_CLK for discharging.
The sampling time can be chosen by SASHT1 and SASHT0 bits of the SADMOD register.
Conversion time can be chosen by SACK1 and SACK0 bits of the SADMOD register.
Sampling time
Sampling time
CLK/LSCLK
SARUN bit
SADINT
(SA-ADC interrupt)
A/D converting
Conversion time Conversion time
A/D conversion
on channel 0
Discharge
Sampling
Presence/absence of discharge can be chosen by SAINIT bit of SADMOD register.
It takes two clocks of SAD_CLK for discharging.
The sampling time can be chosen by SASHT1 and SASHT0 bits of the SADMOD register.
Conversion time can be chosen by SACK1 and SACK0 bits of the SADMOD register.
The A/D conversion interval can be set in the SADSTM register.
A/D conversion interval
Sampling time
Sampling time