LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 638 / 882

ML62Q1000 Series User's Manual
Chapter 20 Analog Comparator
FEUL62Q1000 20-6
20.2.2 Comparator n Control Register (CMPnCON: n=0,1)
CMPnCON is a special function register (SFR) used to control the analog comparator.
Address
：
0xF840(CMP0CON)
，
0xF848(CMP1CON)
Access
：
R/W
Access size
：
8bit
Initial value
：
0x00
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Word
-
Byte
- CMPnCON
Bit
- - - - - - - - - - - - - -
CMPn
D
CMPn
EN
R/W R R R R R R R R R R R R R R R R/W
Initial
value
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit No.
Bit symbol
name
Description
7 to 2 - Reserved bit
1 CMPnD This bit is used to indicate the comparison result of the analog comparator.
The last comparison result is retained when the comparator is stopped.
0: CMPnP < CMPnM or 0.8V internal reference (Initial)
1: CMPnP > CMPnM or 0.8V internal reference
0 CMPnEN This bit is used to control enable or disable the operation of the comparator.
0: Disables operating the comparator (initial value)
1: Enables operating the comparator
[Note]
Ÿ
When using the analog comparator, write
"
0
"
to the target PnmIE bit and PnmOE bit of port n mode
registers (n=0 to 9, A, B
，
m=0 to 7) to set the general port to Hi-impedace, othewise a shoot-through
current may flow.
Ÿ
An infuluence of the noise is reduceable by preventing the switching of neighboring pins while reading
the COMP0D bit when the comparator enables.