Intel 8XC196NT, User Manual

Page: 68 / 597

4-1
CHAPTER 4
MEMORY PARTITIONS
This chapter describes the organization of the address space, its major partitions, and the 1-Mbyte
and 64-Kbyte operating modes. 1-Mbyte refers to the address space defined by the 20 external
address lines. In 1-Mbyte mode, code can execute from almost anywhere in the 1-Mbyte space.
In 64-Kbyte mode, code can execute only from the 64-Kbyte area FF0000–FFFFFFH. The 64-
Kbyte mode provides compatibility with software written for previous 16-bit MCS
®
96 micro-
controllers. In either mode, nearly all of the 1-Mbyte address space is available for data storage.
Other topics covered in this chapter include the following:
•
the relationship between the 1-Mbyte address space defined by the 20 external address lines
and the 16-Mbyte address space defined by the 24 internal address lines
•
extended and nonextended data accesses
•
a windowing technique for accessing the upper register file and peripheral SFRs with direct
addressing
•
examples of external memory configurations for the 1-Mbyte and 64-Kbyte modes
•
a method for remapping the 32-Kbyte internal OTPROM (87C196NT only)
4.1 MEMORY MAP OVERVIEW
The instructions can address 16 Mbytes of memory. However, only 20 of the 24 address lines are
implemented by external pins: A19:16 and AD15:0. The lower 16 address/data lines, AD15:0,
are the same as those in all other MCS 96 microcontrollers. The four extended address lines,
A19:16, are provided by the EPORT. If, for example, an internal 24-bit address is FF2018H, the
20 external-address pins output F2018H. Further, the address seen by an external device depends
on how many of the extended address lines are connected to the device. (See “Internal and Exter-
nal Addresses” on page 14-1.)
The 20 external-address pins can address 1 Mbyte of external memory. For purposes of discussion
only, it is convenient to view this 1-Mbyte address
space as sixteen 64-Kbyte pages, numbered
00H–0FH (see Figure 4-1 on page 4-2). The lower 16 address lines enable the device to address
page 00H. The four extended address lines enable the device to address the remaining external
address space, pages 01H–0FH.