Intel 8XC196NT, User Manual

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8XC196NT USER’S MANUAL
13-2
P5.4 Test-
mode
entry I/O Test-mode entry
If this pin is held low during reset, the device will enter a reserved test
mode, so exercise caution if you use this pin for input. If you choose
to configure this pin as an input, always hold it high during reset and
ensure that your system meets the V
IH
specification (see datasheet) to
prevent inadvertent entry into a test mode.
— RESET# I/O Reset
A level-sensitive reset input to and open-drain system reset output
from the microcontroller. Either a falling edge on RESET# or an
internal reset turns on a pull-down transistor connected to the RESET
pin for 16 state times. In the powerdown and idle modes, asserting
RESET# causes the chip to reset and return to normal operating
mode. The microcontroller resets to FF2080H in internal OTPROM or
F2080H in external memory.
— V
PP
PWR Programming Voltage
During programming, the V
PP
pin is typically at +12.5 V (V
PP
voltage).
Exceeding the maximum V
PP
voltage specification can damage the
device.
V
PP
also causes the device to exit powerdown mode when it is driven
low for at least 50 ns. Use this method to exit powerdown only when
using an external clock source because it enables the internal phase
clocks, but not the internal oscillator.
On devices with no internal nonvolatile memory, connect V
PP
to V
CC
.
Table 13-2. Operating Mode Control and Status Registers
Mnemonic Address Description
CCR0 2018H Chip Configuration 0 Register
Bit 0 of this register enables and disables powerdown mode.
INT_MASK1 0013H Interrupt Mask 1
Bit 6 of this 8-bit register enables and disables (masks) the
external interrupt (EXTINT).
INT_PEND1 0012H Interrupt Pending 1
When set, bit 6 of this register indicates a pending external
interrupt.
P2_DIR
P5_DIR 1FCBH
1FF3H Port
x
Direction
Each bit of P
x
_DIR controls the direction of the corresponding pin.
Clearing a bit configures a pin as a complementary output; setting
a bit configures a pin as an input or open-drain output. (Open-
drain outputs require external pull-ups.)
P2_MODE
P5_MODE 1FC9H
1FF1H Port x Mode
Each bit of P x _MODE controls whether the corresponding pin
functions as a standard I/O port pin or as a special-function
signal. Setting a bit configures a pin as a special-function signal;
clearing a bit configures a pin as a standard I/O port pin.
Table 13-1. Operating Mode Control Signals (Continued)
Port Pin
Signal
Name
Type Description