Intel 8XC196NT, User Manual

Page: 584 / 597

Index-3
INDEX
Carry (C) flag, 3-5, A-4, A-5, A-11, A-22, A-23,
A-24, A-25, A-35
Cascading timers, 10-7
CBE flag, C-51
CCB fetch, 14-5
and BHE#, 6-13
and bus-width, 14-11
and P5.5, 6-13
and P5.6, 6-13
and READY, 6-13
CCBs, 4-6, 4-8, 12-8, 14-5
security-lock bits, 15-29–15-30
CCRs, 4-8, 12-8, 13-4, 14-5
CCR0, 14-6, 14-7, 14-23
CCR1, 14-8
CCR2, 14-10
security-lock bits, 15-17
Chip configuration, See CCBs, CCRs
Clear, defined, 1-3
CLKOUT, 13-1, 14-3, 14-13, B-6
and BUSWIDTH, 14-12
and HOLD#, 14-19
and internal timing, 2-6
and interrupts, 5-6
and READY, 14-18
and RESET#, 12-9
considerations, 6-12
idle, powerdown, reset status, B-14
reset status, 6-6
Clock
external, 12-7
generator, 2-6, 12-7, 12-9
internal, and idle mode, 13-3, 13-4
phases, internal, 2-7
slow, 10-7
sources, 12-5
CLR instruction, A-2, A-11, A-46, A-52, A-59
CLRB instruction, A-2, A-11, A-46, A-52, A-59
CLRC instruction, A-3, A-11, A-51, A-58, A-66
CLRVT instruction, A-3, A-11, A-51, A-58, A-66
CMP instruction, A-3, A-11, A-48, A-52, A-59
CMPB instruction, A-3, A-12, A-49, A-52, A-59
CMPL instruction, A-2, A-12, A-50, A-52, A-59
Code execution, 2-4, 2-5
Code fetches, 4-26
COMP0_CON, C-66
COMP0_TIME, C-66
COMP1_CON, C-66
COMP1_TIME, C-66
CompuServe forums, 1-10
Conditional jump instructions, A-5
Constants, near, 4-24
CPU, 2-3
CPVER, 15-12, B-6
Customer service, 1-8
D
Data
far, 4-24
fetches, 4-27
near, 4-24
types, 3-1–3-5
addressing restrictions, 3-1
converting between, 3-4
defined, 3-1
iC-96, 3-1
PLM-96, 3-1
signed and unsigned, 3-1, 3-4
values permitted, 3-1
Data instructions, A-55, A-62
Datasheets
online, 1-10
ordering, 1-7
Deassert, defined, 1-3
DEC instruction, A-2, A-12, A-46, A-52, A-59
DECB instruction, A-2, A-12, A-46, A-52, A-59
DED bit, 15-6–15-8, 15-30
DEI bit, 15-6–15-8, 15-17
Device
clock sources, 12-5
minimum hardware configuration, 12-1
pin reset status, B-14
programming, 15-1–15-44
reset, 12-8, 12-9, 12-10, 12-11, 12-12, 14-23
signal descriptions, B-4
DI instruction, A-3, A-13, A-51, A-58, A-66
Direct addressing, 3-7, 3-11, 4-13
and register RAM, 4-13
and windows, 4-15, 4-22
DIV instruction, A-13, A-51, A-53, A-60
DIVB instruction, A-13, A-51, A-53, A-60
DIVU instruction, A-3, A-14, A-48, A-53, A-60
DIVUB instruction, A-3, A-14, A-49, A-53, A-60
DJNZ instruction, A-2, A-5, A-14, A-50, A-57,
A-65