Intel 8XC196NT, User Manual

Page: 426 / 597

A-17
INSTRUCTION SET REFERENCE
ECALL EXTENDED CALL. Pushes the contents of
the program counter (the return address)
onto the stack, then adds to the program
counter the offset between the end of this
instruction and the target label, effecting the
call. The operand may be any address in the
address space.
This instruction is an unconditional relative
call to anywhere in the 16-Mbyte address
space). It functions only in extended
addressing mode.
SP
←
SP – 4
(SP)
←
PC
PC
←
PC + 24-bit disp
ECALL cadd
(1111 0001) (disp-low) (disp-high) (disp-ext)
NOTE: For 20-bit addresses, the offset
must be in the range of +524287
to –524288.
PSW Flag Settings
Z N C V VT ST
— — — — — —
EI ENABLE INTERRUPTS. Enables interrupts
following the execution of the next statement.
Interrupt calls cannot occur immediately
following this instruction.
Interrupt Enable (PSW.1)
←
1
EI
(11111011)
PSW Flag Settings
Z N C V VT ST
— — — — — —
EJMP EXTENDED JUMP. Adds to the program
counter the offset between the end of this
instruction and the target label, effecting the
jump. The operand may be any address in
the entire address space. The offset must be
in the range of +8,388,607 to –8,388,608.
This instruction is an unconditional, relative
jump to anywhere in the 16-Mbyte address
space. It functions only in extended
addressing mode.
PC
←
PC + 24-bit disp
EJMP cadd
(11100110) (disp-low) (disp-high) (disp-ext)
NOTE: For 20-bit addresses, the offset
must be in the range of +524287
to –524288.
PSW Flag Settings
Z N C V VT ST
— — — — — ?
Table A-6. Instruction Set (Continued)
Mnemonic Operation Instruction Format