A-39
INSTRUCTION SET REFERENCE
SHRAL
ARITHMETIC RIGHT SHIFT DOUBLE-
WORD. Shifts the destination double-word
operand to the right as many times as
specified by the count operand. The count
may be specified either as an immediate
value in the range of 0 to 15 (0FH), inclusive,
or as the content of any register (10H –
0FFH) with a value in the range of 0 to 31
(1FH), inclusive. If the original high order bit
value was “0,” zeroes are shifted in. If the
value was “1,” ones are shifted in.
Temp
←
(COUNT)
do while Temp
≠
0
C
←
Low order bit of (DEST)
(DEST)
←
(DEST)/2
Temp
←
Temp – 1
end_while
SHRAL lreg,#count
(00001110) (count) (lreg)
or
SHRAL lreg,breg
(00001110) (breg) (lreg)
NOTES:
This instruction clears the
sticky bit flag at the beginning
of the instruction. If at any time
during the shift a “1” is shifted
into the carry flag and another
shift cycle occurs, the instruc-
tion sets the sticky bit flag.
In this operation, DEST/2 rep-
resents signed division.
PSW Flag Settings
Z
N
C
V
VT
ST
✓
✓
✓
0
—
✓
SHRB
LOGICAL RIGHT SHIFT BYTE. Shifts the
destination byte operand to the right as many
times as specified by the count operand. The
count may be specified either as an
immediate value in the range of 0 to 15
(0FH), inclusive, or as the content of any
register (10H – 0FFH) with a value in the
range of 0 to 31 (1FH), inclusive. The left bits
of the result are filled with zeroes. The last bit
shifted out is saved in the carry flag.
Temp
←
(COUNT)
do while Temp
≠
0
C
←
Low order bit of (DEST)
(DEST)
←
(DEST)/2
Temp
←
Temp–1
end_while
SHRB breg,#count
(00011000) (count) (breg)
or
SHRB breg,breg
(00011000) (breg) (breg)
NOTES:
This instruction clears the
sticky bit flag at the beginning
of the instruction. If at any time
during the shift a “1” is shifted
into the carry flag and another
shift cycle occurs, the instruc-
tion sets the sticky bit flag.
In this operation, DEST/2 rep-
resents unsigned division.
PSW Flag Settings
Z
N
C
V
VT
ST
✓
0
✓
0
—
✓
Table A-6. Instruction Set (Continued)
Mnemonic
Operation
Instruction Format
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
Page 581: ......
Page 597: ......