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C-59
REGISTERS
SSIOx_CON
SSIO
x
_CON
x
= 0–1
Address:
Reset State:
Table C-15
The synchronous serial control
x
(SSIO
x
_CON) registers control the communications mode and
handshaking. The two least-significant bits indicate whether an overflow or underflow has occurred
and whether the channel is ready to transmit or receive.
7
0
M/S#
T/R#
TRT
THS
STE
ATR
OUF
TBS
Bit
Number
Bit
Mnemonic
Function
7
†
M/S#
Master/Slave Select
Configures the channel as either master or slave.
0 = slave; SC
x
is an external clock input to SSIO
x
_BUF
1 = master; SC
x
is an output driven by the SSIO baud-rate generator
6
†
T/R#
Transmit/Receive Select
Configures the channel as either transmitter or receiver.
0 = receiver; SD
x
is an input to SSIO
x
_BUF
1 = transmitter; SD
x
is an output driven by the output of SSIO
x
_BUF
5
TRT
Transmitter/Receiver Toggle
Controls whether receiver and transmitter switch roles at the end of each
transfer.
0 = do not switch
1 = switch; toggle T/R# and clear TRT at the end of the current transfer
Setting TRT allows the channel configuration to change immediately on
transfer completions, thus avoiding possible contention on the data line.
4
THS
Transceiver Handshake Select
Enables and disables handshaking. The THS, STE, and ATR bits must be
set for handshaking modes.
0 = disables handshaking
1 = enables handshaking
3
STE
Single Transfer Enable
Enables and disables transfer of a single byte. Unless ATR is set, STE is
automatically cleared at the end of a transfer. The THS, STE, and ATR
bits must be set for handshaking modes.
0 = disable transfers
1 = allow transmission or reception of a single byte.
2
ATR
Automatic Transfer Re-enable
Enables and disables subsequent transfers. The THS, STE, and ATR bits
must be set for handshaking modes.
0 = allow automatic clearing of STE; disable subsequent transfers
1 = prevent automatic clearing of STE; allow transfer of next byte
†
The M/S# and T/R# bits specify four possible configurations: master transmitter, master receiver,
slave transmitter, or slave receiver.
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
Page 581: ......
Page 597: ......