8-3
SYNCHRONOUS SERIAL I/O (SSIO) PORT
8.3
SSIO OPERATION
Each SSIO channel can be configured as either master or slave and as either transmitter or receiv-
er, allowing the channels to communicate in several bidirectional, single-byte transfer modes
(Figure 8-2). A master device transmits a clock signal; a slave device receives a clock signal.
INT_PEND1
0012H
Interrupt Pending 1
When set, SSIO0 indicates a pending channel 0 transfer interrupt.
When set, SSIO1 indicates a pending channel 1 transfer interrupt.
P6_DIR
1FD2H
Port 6 Direction
This register selects the direction of each port 6 pin. Clear P6_DIR.7:4
to configure SD1 (P6.7), SC1 (P6.6), SD0 (P6.5), and SC0 (P6.4) as
high-impedance inputs/open-drain outputs.
P6_MODE
1FD1H
Port 6 Mode
This register selects either the general-purpose input/output function or
the peripheral function for each pin of port 6. Set P6_MODE.7:4 to
configure SD1 (P6.7), SC1 (P6.6), SD0 (P6.5), and SC0 (P6.4) for the
SSIO.
P6_PIN
1FD7H
Port 6 Pin State
Read P6_PIN to determine the current values of SD1 (P6.7), SC1
(P6.6), SD0 (P6.5), and SC0 (P6.4).
P6_REG
1FD5H
Port 6 Output Data
This register holds data to be driven out on the pins of port 6. For pins
serving as inputs, set the corresponding P6_REG bits; for pins serving
as outputs, write the data to be driven out on the pins to the corre-
sponding P6_REG bits.
SSIO_BAUD
1FB4H
SSIO Baud Rate
This register enables and disables the baud-rate generator and selects
the SSIO baud rate.
SSIO0_BUF
SSIO1_BUF
1FB0H
1FB2H
SSIO Receive and Transmit Buffers
These registers contain either received data or data for transmission,
depending on the communications mode. Data is shifted into this
register from the SD
x
pin or from this register to the SD
x
pin, with the
most-significant bit first.
SSIO0_CON
SSIO1_CON
1FB1H
1FB3H
These registers control the communications mode and handshaking
and reflect the status of the SSIO channels.
Table 8-2. SSIO Port Control and Status Registers (Continued)
Mnemonic
Address
Description
NOTE:
Always write zeros to the reserved bits in these registers.
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
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Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
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