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8XC196NT USER’S MANUAL
Index-8
NMI, 5-3, 5-4, 5-6, B-8
and bus-hold protocol, 14-22
hardware considerations, 5-6
idle, powerdown, reset status, B-15
Noise, reducing, 6-2, 6-3, 6-6, 11-3, 11-13, 11-14,
12-4, 12-5, 12-6
Nonextended addressing, 4-24
NOP instruction, 3-14, A-3, A-31, A-51, A-58,
A-66
two-byte‚ See SKIP instruction
NORML instruction, 3-5, A-3, A-31, A-46, A-58,
A-65
NOT instruction, A-2, A-32, A-46, A-53, A-60
Notational conventions, 1-3–1-4
NOTB instruction, A-2, A-32, A-46, A-53, A-60
Numbers, conventions, 1-4
O
OBF flag, C-51
OFD bit, 15-7, 15-8
ONCE mode, 2-10, 13-9
entering, 13-9
exiting, 13-9
Opcodes, A-46
EE, and unimplemented opcode interrupt,
A-3, A-51
FE, and signed multiply and divide, A-3
map, A-2
reserved, A-3, A-51
Operand types, See data types
Operands, addressing, 3-12
Operating modes, 2-10
See also 1-Mbyte mode, 64-Kbyte mode
OR instruction, A-2, A-32, A-48, A-53, A-60
ORB instruction, A-2, A-32, A-48, A-53, A-60
Oscillator
and powerdown mode, 13-4
detecting failure, 12-9, 12-12
external crystal, 12-7
on-chip, 12-5
OTPROM
controlling access to internal memory,
15-3–15-6
controlling fetches from external memory,
15-6–15-7
enabling oscillator failure detection circuitry,
15-7
memory map, 15-2
programming, 15-1–15-44
See also programming modes
ROM-dump mode, 15-30
verifying, 15-30
Overflow (V) flag, A-4, A-5, A-25, A-26
Overflow-trap (VT) flag, A-4, A-5, A-11, A-26,
A-27
P
P0.4–P0.7
and programming modes, 15-14
idle, powerdown, reset status, B-14
See also port 0
P0_PIN, C-67
P1.0–P1.7, B-8
idle, powerdown, reset status, B-14
See also port 1
P1_DIR, C-67
P1_MODE, C-67
P1_PIN, C-67
P1_REG, C-67
P2.0–P2.7, B-9
idle, powerdown, reset status, B-14
See also port 2
P2.2 considerations, 13-7
P2.7 reset status, 6-6
P2_DIR, C-67
P2_MODE, C-67
P2_PIN, C-67
P2_REG, C-68
P3.0–P3.7, B-9
idle, powerdown, reset status, B-14
See also port 3
P4.0–P4.7, B-9
idle, powerdown, reset status, B-14
See also port 4
P5.0–P5.7, B-9
idle, powerdown, reset status, B-14
See also port 5
P6.0–P6.7, B-9
idle, powerdown, reset status, B-14
See also port 6
P6_DIR, C-68
P6_MODE, C-68
P6_PIN, C-68
P6_REG, C-68
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
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Page 211: ......
Page 212: ...9 Slave Port...
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Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
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Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
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Page 317: ......
Page 318: ...14 Interfacing with External Memory...
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Page 362: ...15 Programming the Nonvolatile Memory...
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Page 408: ...A Instruction Set Reference...
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Page 476: ...B Signal Descriptions...
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Page 493: ......
Page 494: ...C Registers...
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Page 566: ...Glossary...
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Page 580: ...Index...
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