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8XC196NT USER’S MANUAL
A-10
BMOVI
INTERRUPTIBLE BLOCK MOVE. Moves a
block of word data from one location in
memory to another. The instruction is
identical to BMOV, except that BMOVI is
interruptible. The source and destination
addresses are calculated using the indirect
with autoincrement addressing mode. A long
register (PTRS) addresses the source and
destination pointers, which are stored in
adjacent word registers. The source pointer
(SRCPTR) is the low word and the
destination pointer (DSTPTR) is the high
word of PTRS. A word register (CNTREG)
specifies the number of transfers. The blocks
of data can be located anywhere in page 00H
of register RAM, but should not overlap.
Because the source (SRCPTR) and
destination (DSTPTR) pointers are 16 bits
wide, this instruction uses nonexteneded
data moves. It cannot operate across page
boundaries. (If you need to cross page
boundaries, use the EBMOVI instruction.)
PTSSRC and PTSDST will operate from the
page defined by EP_REG. EP_REG should
be set to 00H to select page 00H (see
“Accessing Data” on page 4-24).
COUNT
←
(CNTREG)
LOOP: SRCPTR
←
(PTRS)
DSTPTR
←
(PTRS + 2)
(DSTPTR)
←
(SRCPTR)
(PTRS)
←
2
(PTRS + 2)
←
2
COUNT
←
COUNT – 1
if COUNT
≠
0 then
go to LOOP
PTRS, CNTREG
BMOVI
lreg, wreg
(11001101) (wreg) (lreg)
NOTE:
The pointers are autoincre-
mented during this instruction.
However, CNTREG is decre-
mented only when the instruction
is interrupted. When BMOVI is
interrupted, CNTREG is updated
to store the interim word count at
the time of the interrupt. For this
reason, you should always reload
CNTREG before starting a
BMOVI.
PSW Flag Settings
Z
N
C
V
VT
ST
—
—
—
—
—
—
BR
BRANCH INDIRECT. Continues execution at
the address specified in the operand word
register.
PC
←
(DEST)
DEST
BR [wreg]
(11100011) (wreg)
NOTE:
In 1-Mbyte mode, the BR instruc-
tion always branches to page
FFH. Use the EBR instruction to
branch to an address on any other
page.
PSW Flag Settings
Z
N
C
V
VT
ST
—
—
—
—
—
—
Table A-6. Instruction Set (Continued)
Mnemonic
Operation
Instruction Format
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
Page 581: ......
Page 597: ......