![Intel 8XC196NT User Manual Download Page 100](http://html1.mh-extra.com/html/intel/8xc196nt/8xc196nt_user-manual_2072210100.webp)
4-33
MEMORY PARTITIONS
The 32K×16 RAM stores far data at addresses 10000–1FFFFH; code could also execute from this
RAM. The 64K×16 flash memory stores code and additional far data at addresses 20000–
3FFFFH. Because addresses 20000–3FFFFH reside in a single memory component, only one
EPORT line (EPORT.1, which provides address line A17) is necessary. EPORT.1 at a logic zero
selects the 32K×16 RAM, while EPORT.1 at a logic one selects the 64K×16 flash. Any of the four
bus-timing modes can be selected because two address latches are used. (See “Bus Timing
Modes” on page 14-34.) Table 4-14 lists the memory addresses for this example.
Figure 4-11. A 1-Mbyte System with a 16-bit Bus
A3057-03
EA#
BUSWIDTH
EPORT.1
AD15:8
D15:8
A14:7
A6:0
D7:0
OE#
UB#
AD7:0
ALE
RD#
WRH#
D7:0
D15:8
OE#
WE#
74LS373
87C196NT
WRL#
LB#
V
CC
A6:0
A15:7
74LS373
CE#
Page 01H
32K × 16 RAM
(code or far data)
10000–1FFFFH
CE#
Pages 02H and 03H
64K × 16 Flash
(code or far data)
20000–3FFFFH
A17
Page 00H
000000–0005FFH,
001F00–009FFFH
Page FFH
FF0400–FF05FFH,
FF2000–FF9FFFH
A7:1
A7:1
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
Page 581: ......
Page 597: ......