8-15
SYNCHRONOUS SERIAL I/O (SSIO) PORT
8.7
PROGRAMMING EXAMPLE
This code example configures SSIO0 as a master transmitter to send one byte of data to SSIO1,
the slave receiver. First it sets up a window to allow direct access to the necessary registers. Next,
it configures the clock and data pins. Since SSIO0 is sending data, SC0 (P6.4) and SD0 (P6.5) are
configured as special-function complementary outputs. Since SSIO1 is receiving data, SC1
(P6.6) and SD1 (P6.7) are configured as special-function inputs. The example also sets up a reg-
ister (result) to store the received data byte.
wsr
equ
014h:byte
p6_dir
equ
0d3h:byte
;window to 1fd3h
p6_mode
equ
0d1h:byte
;window to 1fd1h
p6_reg
equ
0d5h:byte
;window to 1fd5h
ssio_baud equ
0b4h:byte
;window to 1fb4h
ssio0_con equ
0b1h:byte
;window to 1fb1h
ssio1_con equ
0b3h:byte
;window to 1fb3h
ssio0_buf equ
0b0h:byte
;window to 1fb0h
ssio1_buf equ
0b2h:byte
;window to 1fb2h
result
equ
122h:byte
;register to store the received data byte
cseg at 0ff2080h
ldb
wsr,#1fh
;select window 1fh
ldb
p6_dir,#0c0h
;set up SD1/SC1 as inputs and
;set up SD0/SC0 as complementary outputs
ldb
p6_mode,#0f0h
;set up SD1/SC1, SD0/SC0 as special-function
ldb
p6_reg,#0c0h
;set up SD1/SC1 inputs (1), SD0/SC0 outputs (0)
ldb
ssio_baud,#80h
;enable baud-rate generator at 2 MHz
ldb
ssio0_con,#0c9h
;set up channel 0 as master transmitter
ldb
ssio1_con,#08h
;set up channel 1 as slave receiver
ldb
ssio0_buf,#55h
;transmit data 55h
d_wait:
jbc
ssio1_con,0,d_wait
;wait for data to be received
stb
ssio1_buf,result
;store received data in “result”
sjmp $
end
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
Page 581: ......
Page 597: ......