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10-17
EVENT PROCESSOR ARRAY (EPA)
With this method, the resolution of the EPA (selected by the TxCONTROL registers; see Figure
10-8 on page 10-18 and Figure 10-9 on page 10-19) determines the maximum PWM output fre-
quency. (Resolution is the minimum time required between a capture or compare.) At 20 MHz,
a 200 ns resolution results in a maximum PWM of 5 MHz.
10.5 PROGRAMMING THE EPA AND TIMER/COUNTERS
This section discusses configuring the port pins for the EPA and the timer/counters; describes
how to program the timers, the capture/compare channels, and the compare-only channels; and
explains how to enable the EPA interrupts.
10.5.1 Configuring the EPA and Timer/Counter Port Pins
Before you can use the EPA, you must configure the pins of port 1 and port 6 to serve as the spe-
cial-function signals for the EPA and, optionally, for the timer/counter clock source and direction
control signals. See “Bidirectional Ports 1, 2, 5, and 6” on page 6-3 for information about config-
uring the port pins.
NOTE
If you use T2CLK as the timer 2 input clock, you cannot use EPA
capture/compare channel 0. If you use T2DIR as the timer 2 direction-control
source, you cannot use EPA capture/compare channel 1.
Table 10-1 on page 10-3 lists the pins associated with the EPA and the timer/counters. Pins that
are not being used for an EPA channel or timer/counter can be configured as standard I/O.
10.5.2 Programming the Timers
The control registers for the timers are T1CONTROL (Figure 10-8) and T2CONTROL (Figure
10-9). Write to these registers to configure the timers. Write to the TIMER1 and TIMER2 regis-
ters (see Table 10-2 on page 10-3 for addresses) to load a specific timer value.
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
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