Intel 8XC196NT, User Manual

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8XC196NT USER’S MANUAL
11-10
11.6 DESIGN CONSIDERATIONS
This section describes considerations for the external interface circuitry and describes the errors
that can occur in any A/D converter. The datasheet lists the absolute error specification, which
includes all deviations between the actual conversion process and an ideal converter. However,
because the various components of error are important in many applications, the datasheet also
lists the specific error components. This section describes those components. For additional in-
formation and design techniques, consult AP-406, MCS
®
96 Analog Acquisition Primer (order
number 270365). Application note AP-406 is also included in the Embedded Microcontrollers
handbook.
AD_RESULT (Read)
Address:
Reset State:
1FAAH
7F80H
The A/D result (AD_RESULT) register consists of two bytes. The high byte contains the eight most-
significant bits from the A/D converter. The low byte contains the two least-significant bits from a ten-
bit A/D conversion, indicates the A/D channel number that was used for the conversion, and indicates
whether a conversion is currently in progress.
15 8
ADRLT9 ADRLT8 ADRLT7 ADRLT6 ADRLT5 ADRLT4 ADRLT3 ADRLT2
7 0
ADRLT1 ADRLT0 — — STATUS ACH2 ACH1 ACH0
Bit
Number
Bit
Mnemonic
Function
15:6 ADRLT9:0 A/D Result
These bits contain the A/D conversion result.
5:4 — Reserved. These bits are undefined.
3 STATUS A/D Status
Indicates the status of the A/D converter. Up to 8 state times are required
to set this bit following a start command. When testing this bit, wait at
least the 8 state times.
1 = A/D conversion is in progress
0 = A/D is idle
2:0 ACH2:0 A/D Channel Number
These bits indicate the A/D channel number that was used for the
conversion. The 8XC196NT has four A/D channel inputs, numbered 4–7
Figure 11-6. A/D Result (AD_RESULT) Register — Read Format