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EVENT PROCESSOR ARRAY (EPA)
10.8.1 Using the TIJMP Instruction to Reduce Interrupt Service Overhead
The EPAIPV register and the TIJMP instruction can be used together to reduce the interrupt ser-
vice overhead. The primary purpose of the TIJMP instruction is to reduce the interrupt response
time associated with servicing multiplexed interrupts. With TIJMP, the additional time required
to service interrupts is only the instruction time, 15 states. (See Appendix A for additional infor-
mation about TIJMP.)
The format for the TIJMP instruction is:
TIJMP tbase,[index],#index_mask
where:
tbase
is a word register containing the 16-bit starting address of the jump
table, which must be located in page FFH.
[index]
is a word register containing a 16-bit address that points to a register
that contains a 7-bit value used to calculate the offset into the jump
table.
#index_mask
is 7-bit immediate data to mask the index. This value is ANDed with
the 7-bit value pointed to by [index] and the instruction multiplies
the result by two to determine the offset into the jump table.
TIJMP calculates the destination address as follows:
(
[index]
AND
#index_mask
)
×
2
+
tbase
To use the TIJMP instruction in this application, you would create a jump table with 21 destina-
tion addresses; one for each of the 20 EPA interrupt sources and one for the return. The table must
be located in page FFH. The addresses in the table must be the lower 16 bits of the destination
address. The TIJMP instruction will automatically add FF0000H to the destination address.
The following code is a simplified example of an interrupt service routine that uses the EPAIPV
register with the TIJMP instruction to service an EPAx interrupt. This routine services all active
interrupts in the EPA in order of their priority. The TIJMP instruction calculates an offset to fetch
a word from a jump table (JTBASE in this example) which contains the start addresses of the in-
terrupt service routines.
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
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Page 580: ...Index...
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