Intel 8XC196NT, User Manual

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C-55
REGISTERS
SP_CON
SP_CON
Address:
Reset State:
1FBBH
C0H
The serial port control (SP_CON) register selects the communications mode and enables or disables
the receiver, parity checking, and nine-bit data transmission.
7 0
— — PAR TB8 REN PEN M1 M0
Bit
Number
Bit
Mnemonic
Function
7:6 — Reserved; always write as zeros.
5 PAR Parity Selection Bit
Selects even or odd parity.
1 = odd parity
0 = even parity
4 TB8 Transmit Ninth Data Bit
This is the ninth data bit that will be transmitted in mode 2 or 3. This bit is
cleared after each transmission, so it must be set before SBUF_TX is
written. When SP_CON.2 is set, this bit takes on the even parity value.
3 REN Receive Enable
Setting this bit enables the receiver function of the RXD pin. When this
bit is set, a high-to-low transition on the pin starts a reception in mode 1,
2, or 3. In mode 0, this bit must be clear for transmission to begin and
must be set for reception to begin. Clearing this bit stops a reception in
progress and inhibits further receptions.
2 PEN Parity Enable
In modes 1 and 3, setting this bit enables the parity function. This bit
must be cleared if mode 2 is used. When this bit is set, TB8 takes the
parity value on transmissions. With parity enabled, SP_STATUS.7
becomes the receive parity error bit.
1:0 M1:0 Mode Selection
These bits select the communications mode.
M1 M0
0 0 mode 0
0 1 mode 1
1 0 mode 2
1 1 mode 3