![Intel 8XC196NT User Manual Download Page 286](http://html1.mh-extra.com/html/intel/8xc196nt/8xc196nt_user-manual_2072210286.webp)
11-15
ANALOG-TO-DIGITAL CONVERTER
In many applications, it is less critical to record the absolute accuracy of an input than it is to de-
tect that a change has occurred. This approach is acceptable as long as the converter is monotonic
and has no missing codes. That is, increasing input voltages produce adjacent, unique output
codes that are also increasing. Decreasing input voltages produce adjacent, unique output codes
that are also decreasing. In other words, there exists a unique input voltage range for each 10-bit
output code that produces that code only, with a repeatability of typically
±
0.25 LSBs (1.5 mV).
The inherent errors in an analog-to-digital conversion process are quantizing error, zero-offset er-
ror, full-scale error, differential nonlinearity, and nonlinearity. All of these are transfer function
errors related to the A/D converter. In addition, temperature coefficients, V
CC
rejection, sample-
hold feedthrough, multiplexer off-isolation, channel-to-channel matching, and random noise
should be considered. Fortunately, one absolute error specification (listed in datasheets) de-
scribes the total of all deviations between the actual conversion process and an ideal converter.
However, the various components of error are important in many applications.
An unavoidable error results from the conversion of a continuous voltage to an integer digital rep-
resentation. This error, called quantizing error, is always
±
0.5 LSB. Quantizing error is the only
error seen in a perfect A/D converter, and it is obviously present in actual converters. Figure 11-9
shows the transfer function for an ideal 3-bit A/D converter.
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
Page 581: ......
Page 597: ......