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8XC196NT USER’S MANUAL
C-64
USFR
USFR
Address:
Reset State:
1FF6H
XXH
The unerasable PROM (USFR) register contains two bits that disable external fetches of data and
instructions and another that detects a failed oscillator. These bits can be programmed, but cannot be
erased.
WARNING: These bits can be programmed, but can never be erased. Programming these bits makes
dynamic failure analysis impossible. For this reason, devices with programmed UPROM bits cannot
be returned to Intel for failure analysis.
7
0
—
—
—
—
DEI
DED
—
OFD
Bit
Number
Bit
Mnemonic
Function
7:4
—
Reserved; always write as zeros.
3
DEI
Disable External Instruction Fetch
Setting this bit prevents the bus controller from executing external
instruction fetches. Any attempt to load an external address initiates a
reset.
2
DED
Disable External Data Fetch
Setting this bit prevents the bus controller from executing external data
reads and writes. Any attempt to access data through the bus controller
initiates a reset.
1
—
Reserved; always write as zero.
0
OFD
Oscillator Fail Detect
Setting this bit enables the device to detect a failed oscillator and reset
itself. (In EPROM packages, this bit can be erased.)
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
Page 581: ......
Page 597: ......