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3-9
PROGRAMMING CONSIDERATIONS
3.2.3.4
Indirect Addressing with the Stack Pointer
You can also use indirect addressing to access the top of the stack by using the stack pointer as
the WORD register in an indirect reference. The following instruction uses indirect addressing
with the stack pointer:
PUSH [SP]
; duplicate top of stack
; SP
←
SP +2
3.2.4
Indexed Addressing
Indexed addressing calculates an address by adding an offset to a base address. There are three
variations of indexed addressing: short-indexed, long-indexed, and zero-indexed. Both short- and
long-indexed addressing are used to access a specific element within a structure. Short-indexed
addressing can access up to 255 byte locations, long-indexed addressing can access up to 65,535
byte locations, and zero-indexed addressing can access a single location. An instruction can con-
tain only one indexed reference; any remaining operands must be direct references.
3.2.4.1
Short-indexed Addressing
In a short-indexed instruction, you specify the offset as an 8-bit constant and the base address as
an indirect address register (a WORD). The following instructions use short-indexed addressing.
LD
AX,12[BX]
; AX
←
MEM_WORD(BX+12)
MULB AX,BL,3[CX]
; AX
←
BL
×
MEM_BYTE(CX+3)
The instruction LD AX,12[BX] loads AX with the contents of the memory location that resides
at address BX+12. That is, the instruction adds the constant 12 (the offset) to the contents of BX
(the base address), then loads AX with the contents of the resulting address. For example, if BX
contains 1000H, then AX is loaded with the contents of location 1012H. Short-indexed address-
ing is typically used to access elements in a structure, where BX contains the base address of the
structure and the constant (12 in this example) is the offset of a specific element in a structure.
You can also use the stack pointer in a short-indexed instruction to access a particular location
within the stack, as shown in the following instruction.
LD
AX,2[SP]
3.2.4.2
Long-indexed Addressing
In a long-indexed instruction, you specify the base address as a 16-bit variable and the offset as
an indirect address register (a WORD). The following instructions use long-indexed addressing.
LD
AX,TABLE[BX]
; AX
←
MEM_WORD(TABLE+BX)
AND
AX,BX,TABLE[CX]
; AX
←
BX AND MEM_WORD(TABLE+CX)
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
Page 581: ......
Page 597: ......