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15-33
PROGRAMMING THE NONVOLATILE MEMORY
Because the RISM begins at location 2000H in serial port programming mode, the OTPROM lo-
cations are automatically remapped as shown in Table 15-11. For example, to access OTPROM
location FF2000H in serial port programming mode, you must address it as A000H.
15.10.2 Changing Serial Port Programming Defaults
Several locations in test ROM are used to control operating parameters. The test ROM routine
establishes the default values shown in Table 15-12. To change the default values, write the de-
sired values to the test ROM addresses shown in the table. (Refer to the SP_BAUD and SP_CON
register descriptions in Appendix C and the SP_PPW description on page 15-9.) After you write
the new values to the test ROM locations, the RISM writes the programmed values into the asso-
ciated registers.
The default programming pulse width is longer than required. To avoid unnecessarily long pro-
gramming times, change the default value before beginning to program the device. For a 100-µs
pulse width, use the following formula to determine the required PPW_VALUE and write that
value to the test ROM location listed in Table 15-12.
Table 15-11. 87C196NT Serial Port Programming Mode Memory Map
Description
Address Range (Hex)
Normal Operation
Serial Port Programming Mode
Internal OTPROM
FF2000–FF9FFF
A000–FFFF, 8000–9FFF
†
External memory
—
4000–9FFF
Do not address
—
2400–3FFF
Test ROM and RISM
—
2000–23FF
†
The lower 24 Kbytes of internal OTPROM (FF2000–FF7FFFH) are remapped to A000–FFFFH.
The upper 8 Kbytes (FF8000–FF9FFF) must be addressed as 8000–9FFFH.
Table 15-12. 87C196NT Serial Port Programming Default Values and Locations
Parameter
RISM Default
Test ROM Address
SFR
Mode
09H; mode 1, receiver enabled
2215H
SP_CON
Baud rate
8067H; 9600 baud at 16 MHz
2216H
SP_BAUD
Pulse width
80FFH; 2.30ms per pulse at 16 MHz
221C–221DH
SP_PPW
PPW_VALUE
0.6944
F
osc
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Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
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