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A-13
INSTRUCTION SET REFERENCE
DI
DISABLE INTERRUPTS. Disables
interrupts. Interrupt-calls cannot occur after
this instruction.
Interrupt Enable (PSW.1)
←
0
DI
(11111010)
PSW Flag Settings
Z
N
C
V
VT
ST
—
—
—
—
—
—
DIV
DIVIDE INTEGERS. Divides the contents of
the destination long-integer operand by the
contents of the source integer word operand,
using signed arithmetic. It stores the quotient
into the low-order word of the destination
(i.e., the word with the lower address) and the
remainder into the high-order word. The
following two statements are performed
concurrently.
(low word DEST)
←
(DEST) / (SRC)
(high word DEST)
←
(DEST) MOD (SRC)
DEST, SRC
DIV lreg,
waop
(11111110) (100011aa) (waop) (lreg)
PSW Flag Settings
Z
N
C
V
VT
ST
—
—
—
✓
↑
—
DIVB
DIVIDE SHORT-INTEGERS. Divides the
contents of the destination integer operand
by the contents of the source short-integer
operand, using signed arithmetic. It stores the
quotient into the low-order byte of the
destination (i.e., the word with the lower
address) and the remainder into the high-
order byte. The following two statements are
performed concurrently.
(low byte DEST)
←
(DEST) / (SRC)
(high byte DEST)
←
(DEST) MOD (SRC)
DEST, SRC
DIVB
wreg, baop
(11111110) (100111aa) (baop) (wreg)
PSW Flag Settings
Z
N
C
V
VT
ST
—
—
—
✓
↑
—
Table A-6. Instruction Set (Continued)
Mnemonic
Operation
Instruction Format
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
Page 581: ......
Page 597: ......