Intel 8XC196NT, User Manual

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8XC196NT USER’S MANUAL
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2.5.6 Analog-to-digital Converter
The analog-to-digital (A/D) converter converts an analog input voltage to a digital equivalent.
Resolution is either 8 or 10 bits; sample and convert times are programmable. Conversions can
be performed on the analog ground and reference voltage, and the results can be used to calculate
gain and zero-offset errors. The internal zero-offset compensation circuit enables automatic zero-
offset adjustment. The A/D also has a threshold-detection mode, which can be used to generate
an interrupt when a programmable threshold voltage is crossed in either direction. The A/D scan
mode of the PTS facilitates automated A/D conversions and result storage.
The main components of the A/D converter are a sample-and-hold circuit and an 8-bit or 10-bit
successive approximation analog-to-digital converter. See Chapter 11, “Analog-to-digital Con-
verter,” for more information.
2.5.7 Watchdog Timer
The watchdog timer is a 16-bit internal timer that resets the device if the software fails to operate
properly. See Chapter 12, “Minimum Hardware Considerations,” for more information.
2.6 SPECIAL OPERATING MODES
In addition to the normal execution mode, the device operates in several special-purpose modes.
Idle and powerdown modes conserve power when the device is inactive. On-circuit emulation
(ONCE) mode electrically isolates the microcontroller from the system, and several other modes
provide programming options for nonvolatile memory. See Chapter 13, “Special Operating
Modes,” for more information about idle, powerdown, and ONCE modes and Chapter 15, “Pro-
gramming the Nonvolatile Memory,” for details about programming options.
2.6.1 Reducing Power Consumption
In idle mode, the CPU stops executing instructions, but the peripheral clocks remain active. Pow-
er consumption drops to about 40% of normal execution mode consumption. Either a hardware
reset or any enabled interrupt source will bring the device out of idle mode.
In powerdown mode, all internal clocks are frozen at logic state zero and the oscillator is shut off.
The register file, internal code and data RAM, and most peripherals retain their data if V
CC
is
maintained. Power consumption drops into the µW range.