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12-5
MINIMUM HARDWARE CONSIDERATIONS
If the A/D converter will be used, connect V
REF
to a separate reference supply to minimize noise
during A/D conversions. Even if the A/D converter will not be used, V
REF
and ANGND must be
connected to provide power to port 0. Refer to “Analog Ground and Reference Voltages” on page
11-13 for a detailed discussion of A/D power and ground recommendations.
Multilayer printed circuit boards with separate V
CC
and ground planes also help to minimize
noise. For more information on noise protection, refer to AP-125, Designing Microcontroller Sys-
tems for Noisy Environments and AP-711, EMI Design Techniques for Microcontrollers in Auto-
motive Applications.
12.4 PROVIDING THE CLOCK
The device can either use the on-chip oscillator to generate the clocks or use an external clock
input signal. The following paragraphs describe the considerations for both methods.
12.4.1 Using the On-chip Oscillator
The on-chip oscillator circuit (Figure 12-3) consists of a crystal-controlled, positive reactance os-
cillator. In this application, the crystal operates in a parallel resonance mode. The feedback resis-
tor, Rf, consists of paralleled n-channel and p-channel FETs controlled by the internal powerdown
signal. In powerdown mode, Rf acts as an open and the output drivers are disabled, which disables
the oscillator. Both the XTAL1 and XTAL2 pins have built-in electrostatic discharge (ESD) pro-
tection.
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
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