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8XC196NT USER’S MANUAL
7-10
CAUTION
For mode 0 receptions, the BAUD_VALUE must be 0002H or greater.
Otherwise, the resulting data in the receive shift register will be incorrect.
SP_BAUD
Address:
Reset State:
1FBCH
0000H
The serial port baud rate (SP_BAUD) register selects the serial port baud rate and clock source. The
most-significant bit selects the clock source. The lower 15 bits represent BAUD_VALUE, an unsigned
integer that determines the baud rate.
The maximum BAUD_VALUE is 32,767 (7FFFH). In asynchronous modes 1, 2, and 3, the minimum
BAUD_VALUE is 0000H when using XTAL1 and 0001H when using T1CLK. In synchronous mode 0,
the minimum BAUD_VALUE is 0001H for transmissions and 0002H for receptions.
15
8
CLKSRC
BV14
BV13
BV12
BV11
BV10
BV9
BV8
7
0
BV7
BV6
BV5
BV4
BV3
BV2
BV1
BV0
Bit
Number
Bit
Mnemonic
Function
15
CLKSRC
Serial Port Clock Source
This bit determines whether the serial port is clocked from an internal or
an external source.
1 = XTAL1 (internal source)
0 = T1CLK (external source)
14:0
BV14:0
Baud Rate
These bits constitute the BAUD_VALUE.
Use the following equations to determine the BAUD_VALUE for a given
baud rate.
Synchronous mode 0:
†
or
Asynchronous modes 1, 2, and 3:
or
†
For mode 0 receptions, the BAUD_VALUE must be 0002H or greater.
Otherwise, the resulting data in the receive shift register will be incorrect.
Figure 7-7. Serial Port Baud Rate (SP_BAUD) Register
BAUD_VALUE
F
OS C
Baud Rate
2
×
--------------------------------------
1
–
=
T1CLK
Baud Rate
----------------------------
BAUD_VALUE
F
O SC
Baud Rate
16
×
-----------------------------------------
1
–
=
T1CLK
Baud Rate
8
×
--------------------------------------
Summary of Contents for 8XC196NT
Page 1: ...8XC196NT Microcontroller User s Manual...
Page 2: ...8XC196NT Microcontroller User s Manual June 1995 Order Number 272317 003...
Page 22: ...1 Guide to This Manual...
Page 23: ......
Page 35: ......
Page 36: ...2 Architectural Overview...
Page 37: ......
Page 49: ......
Page 50: ...3 Programming Considerations...
Page 51: ......
Page 66: ...4 Memory Partitions...
Page 67: ......
Page 104: ...5 Standard and PTS Interrupts...
Page 105: ......
Page 147: ......
Page 148: ...6 I O Ports...
Page 149: ......
Page 176: ...7 Serial I O SIO Port...
Page 177: ......
Page 194: ...8 Synchronous Serial I O SSIO Port...
Page 195: ......
Page 211: ......
Page 212: ...9 Slave Port...
Page 213: ......
Page 231: ......
Page 232: ...10 Event Processor Array EPA...
Page 233: ......
Page 270: ...11 Analog to digital Converter...
Page 271: ......
Page 291: ......
Page 292: ...12 Minimum Hardware Considerations...
Page 293: ......
Page 306: ...13 Special Operating Modes...
Page 307: ......
Page 317: ......
Page 318: ...14 Interfacing with External Memory...
Page 319: ......
Page 362: ...15 Programming the Nonvolatile Memory...
Page 363: ......
Page 408: ...A Instruction Set Reference...
Page 409: ......
Page 476: ...B Signal Descriptions...
Page 477: ......
Page 493: ......
Page 494: ...C Registers...
Page 495: ......
Page 565: ......
Page 566: ...Glossary...
Page 567: ......
Page 580: ...Index...
Page 581: ......
Page 597: ......