Chapter 13 Programmable Trigger Unit (PTUV2)
MC9S12ZVM Family Reference Manual Rev. 1.3
Freescale Semiconductor
475
13.3.2.14
PTU Pointer Register (PTUPTRH, PTUPTRM, PTUPTRL)
Module Base + 0x0011
Access: User read/write
(1)
1. Read: Anytime
Write: Anytime, if TG0En and TG1EN bit are cleared
7
6
5
4
3
2
1
0
R
PTUPTR[23:16]
W
Reset
0
0
0
0
0
0
0
0
Module Base + 0x0012
Access: User read/write
7
6
5
4
3
2
1
0
R
PTUPTR[15:8]
W
Reset
0
0
0
0
0
0
0
0
Module Base + 0x0013
Access: User read/write
7
6
5
4
3
2
1
0
R
PTUPTR[7:1]
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented
Figure 13-16. PTU List Add Register (PTUPTRH, PTUPTRM, PTUPTRL)
Table 13-16. PTUPTR Register Field Descriptions
Field
Description
PTUPTR
[23:0]
PTU Pointer — This register cannot be modified if TG0EN or TG1EN bit is set. This register defines the start
address of the used list area inside the global memory map. For more information see
