Freescale Semiconductor MC9S12ZVM series, Reference Manual

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Chapter 2 Port Integration Module (S12ZVMPIMV1)
MC9S12ZVM Family Reference Manual Rev. 1.3
94 Freescale Semiconductor
2.3.2 PIM Registers 0x0200-0x020F
This section details the specific purposes of register implemented in address range 0x0200-0x020F. These
registers serve for specific PIM related functions not part of the generic port registers.
• If not stated differently, writing to reserved bits has no effect and read returns zero.
• All register read accesses are synchronous to internal clocks.
• Register bits can be written at any time if not stated differently.
2.3.2.1 Module Routing Register 0 (MODRR0)
0x02F5 Reserved
R 0 0 0 0 0 0 0 0
W
0x02F6 PIEP
R
OCIE1
0 0 0 0
PIEP2 PIEP1 PIEP0
W
0x02F7 PIFP
R
OCIF1
0 0 0 0
PIFP2 PIFP1 PIFP0
W
0x02F8–
0x02FC
Reserved
R 0 0 0 0 0 0 0 0
W
0x02FD RDRP
R 0 0 0 0 0 0 0
RDRP0
W
0x02FE–
0x02FF
Reserved
R 0 0 0 0 0 0 0 0
W
Address 0x0200 Access: User read/write
(1)
1. Read: Anytime
Write: Once in normal, anytime in special mode
7 6 5 4 3 2 1 0
R 0 0
SPI0SSRR SPI0RR SCI1RR S0L0RR2-0
W
— — SPI0 SS0 SPI0 SCI1 SCI0-LINPHY0 (see Figure 2-2 )
Reset 0 0 0 0 0 0 0 0
Figure 2-1. Module Routing Register 0 (MODRR0)
Global
Address
Register
Name
Bit 7 6 5 4 3 2 1 Bit 0