![Freescale Semiconductor MC9S12ZVM series Reference Manual Download Page 533](http://html1.mh-extra.com/html/freescale-semiconductor/mc9s12zvm-series/mc9s12zvm-series_reference-manual_2330602533.webp)
Chapter 14 Pulse Width Modulator with Fault Protection (PMF15B6CV3)
MC9S12ZVM Family Reference Manual Rev. 1.3
Freescale Semiconductor
533
•
In edge-aligned operation, decreasing or increasing the PWM value by a correction value equal to
the deadtime typically compensates for deadtime distortion.
•
In center-aligned operation, decreasing or increasing the PWM value by a correction value equal
to one-half the deadtime typically compensates for deadtime distortion.
In the complementary channel operation, ISENS selects one of three correction methods:
•
Manual correction
•
Automatic current status correction during deadtime
•
Automatic current status correction when the PWM counter value equals the value in the PWM
counter modulus registers
NOTE
External current status sensing circuitry is required at the corresponding
inputs which produces a logic zero level for positive current and logic one
for negative current. PWM 0, 2, and 4 are considered the top PWMs while
the bottom PWMs are PWM 1, 3, and 5.
14.4.6.1
Manual Correction
The IPOL
x
bits select either the odd or the even PWM value registers to use in the next PWM cycle.
Table 14-40. Correction Method Selection
ISENS
Correction Method
00
No correction
(1)
1. The current status inputs can be used as general purpose input/output ports.
01
Manual correction
10
Current status sample correction on inputs IS0, IS1, and IS2 during deadtime
(2)
2. The polarity of the IS input is latched when both the top and bottom PWMs are off. At the 0%
and 100% duty cycle boundaries, there is no deadtime, so no new current value is sensed.
11
Current status sample on inputs IS0, IS1, and IS2
(3)
At the half cycle in center-aligned operation
At the end of the cycle in edge-aligned operation
3. Current is sensed even with 0% or 100% duty cycle.
Table 14-41. Top/Bottom Manual Correction
Bit
Logic state
Output Control
IPOLA
0
PMFVAL0 controls PWM0/PWM1 pair
1
PMFVAL1 controls PWM0/PWM1 pair
IPOLB
0
PMFVAL2 controls PWM2/PWM3 pair
1
PMFVAL3 controls PWM2/PWM3 pair
IPOLC
0
PMFVAL4 controls PWM4/PWM5 pair
1
PMFVAL5 controls PWM4/PWM5 pair