Chapter 1 Device Overview MC9S12ZVM-Family
MC9S12ZVM Family Reference Manual Rev. 1.3
64
Freescale Semiconductor
Before the upcoming
reload
event the CPU:
•
reads the ADC results from the buffered Conversion Result List
•
clears the conversion complete flag
•
services the
reload
by setting new duty cycle values
•
sets the PTULDOK bit (corresponding to
glb_ldok
) to signal the duty cycle coherence
The CPU actions are typically performed in an ISR triggered by the conversion complete flag.
1.13.3.4
Static Timing Fault Handling
The following Faults and/or errors can occur:
•
Desaturation error, Overvoltage, Undervoltage, Temperature sensor, External fault
The application run-time error is handled by the GDU without CPU interaction. Firstly the FETs are
disabled and the PMF signals switched to an inactive state. To re-enable the operation first the GDU fault
and then PWM fault must be cleared, to automatically re-enable the FET driving at the next PWM
boundary.
•
PTU reload overrun error
This is an application run-time error caused by the CPU not setting PTULDOK on time. Servicing this
type of error is application dependent and may range from a further reload attempt to a total shut down.
•
PTU trigger generator reload error, PTU trigger generator error
Since all timing is static, this error should only occur during application debugging. This type of error
occurring in a static timing configuration indicates possible data corruption. This can be serviced by a
control loop shutdown.
•
PTU memory access error, Memory access double bit ECC error
This type of error occurring in an application indicates data corruption. This can be serviced by a control
loop shutdown.
•
ADC sequence overrun, ADC command overrun, ADC command error
Since all timing is static, this error should only occur during application debugging. This type of error
occurring in an application indicates possible data corruption. This can be serviced by a control loop
shutdown.
1.13.3.5
Dynamic Timing Operation
The timing frame is dynamic if the following are modified on a cycle by cycle basis:
•
PMF - duty cycle value registers (PMF_VAL
x
), modulo registers
•
PTU - Trigger Event List (PTU_TEL
x
)
•
ADC - Command Sequence List (ADC
x
_CSL)
The main philosophy is that all cycle-by-cycle settings for cycle
n
need to be done within cycle
n-1
. The
main control cycle synchronization event is the PMF
reload
event, which can be generated every
n
PWM
periods.
