Freescale Semiconductor MC9S12ZVM series, Reference Manual

Page: 200 / 825

Chapter 6 S12Z Debug (S12ZDBGV2) Module
MC9S12ZVM Family Reference Manual Rev. 1.3
200 Freescale Semiconductor
6.3.2.14 Debug Comparator A Data Register (DBGAD)
Read: Anytime.
Write: If DBG not armed and PTACT is clear.
This register can be accessed with a byte resolution, whereby DBGAD0, DBGAD1, DBGAD2, DBGAD3
map to DBGAD[31:0] respectively.
6.3.2.15 Debug Comparator A Data Mask Register (DBGADM)
Read: Anytime.
Address: 0x0118, 0x0119, 0x011A, 0x011B
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
Bit 31 Bit 30 Bit 29 Bit 28 Bit 27 Bit 26 Bit 25 Bit 24 Bit 23 Bit 22 Bit 21 Bit 20 Bit 19 Bit 18 Bit 17 Bit 16
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 6-16. Debug Comparator A Data Register (DBGAD)
Table 6-28. DBGAD Field Descriptions
Field Description
31–16
Bits[31:16]
(DBGAD0,
DBGAD1)
Comparator Data Bits — These bits control whether the comparator compares the data bus bits to a logic one
or logic zero. The comparator data bits are only used in comparison if the corresponding data mask bit is logic 1.
0 Compare corresponding data bit to a logic zero
1 Compare corresponding data bit to a logic one
15–0
Bits[15:0]
(DBGAD2,
DBGAD3)
Comparator Data Bits — These bits control whether the comparator compares the data bus bits to a logic one
or logic zero. The comparator data bits are only used in comparison if the corresponding data mask bit is logic 1.
0 Compare corresponding data bit to a logic zero
1 Compare corresponding data bit to a logic one
Address: 0x011C, 0x011D, 0x011E, 0x011F
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
Bit 31 Bit 30 Bit 29 Bit 28 Bit 27 Bit 26 Bit 25 Bit 24 Bit 23 Bit 22 Bit 21 Bit 20 Bit 19 Bit 18 Bit 17 Bit 16
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 6-17. Debug Comparator A Data Mask Register (DBGADM)