Freescale Semiconductor MC9S12ZVM series, Reference Manual

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MC9S12ZVM Family Reference Manual Rev. 1.3
Freescale Semiconductor 457
Chapter 13
Programmable Trigger Unit (PTUV2)
13.1 Introduction
In PWM driven systems it is important to schedule the acquisition of the state variables with respect to
PWM cycle.
The Programmable Trigger Unit (PTU) is intended to completely avoid CPU involvement in the time
acquisitions of state variables during the control cycle that can be half, full, multiple PWM cycles.
All acquisition time values are stored inside the global memory map, basically inside the system memory;
see the MMC section for the supported memory area. In such cases the pre-setting of the acquisition times
needs to be completed during the previous control cycle to where the actual acquisitions are to be made.
13.1.1 Features
The PTU module includes these distinctive features:
• One 16 bit counter as time base for all trigger events
• Two independent trigger generators (TG0 and TG1)
• Up to 32 trigger events per trigger generator
• Global Load OK support, to guarantee coherent update of all control loop modules
Table 13-1. Revision History Table
Rev. No.
(Item No.)
Data Sections
Affected
Substantial Change(s)
01.00 21 Oct. 2011 all Initial Version
02.00 22. Mar. 2012 13.3.2.1 ,
13.3.2.7 ,
13.3.2.10 ,
13.3.2.14 -
13.3.2.17
- removed PTUWP bit (now: PTUPTR is write protected if both
TGs are disabled, TGxLxIDX is write protected if the
associated TG is disabled)
- TGxLIST bits are writeable if associated TG is disabled
- PTULDOK bit is writable if both TGs are disabled
- TGxLIST swap at every reload with LDOK set
Table 13-2. Terminology
Term Meaning
TG Trigger Generator
EOL End of trigger list