Freescale Semiconductor MC9S12ZVM series, Reference Manual

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Chapter 2 Port Integration Module (S12ZVMPIMV1)
MC9S12ZVM Family Reference Manual Rev. 1.3
110 Freescale Semiconductor
2.3.4.3 Port P Interrupt Flag Register (PIFP)
2.4 Functional Description
2.4.1 General
Each pin except BKGD can act as general-purpose I/O. In addition each pin can act as an output or input
of a peripheral module.
Table 2-20. Port P Interrupt Enable Register Field Descriptions
Field Description
7
OCIE1
Over-Current Interrupt Enable register —
This bit enables or disables the over-current interrupt on PP0.
1 PP0 over-current interrupt enabled
0 PP0 over-current interrupt disabled (interrupt flag masked)
2-0
PIEP2-0
See Section 2.3.3.6, “Port Interrupt Enable Register ”
Address 0x02F7 PIFP Access: User read/write
(1)
1. Read: Anytime
Write: Anytime, write 1 to clear
7 6 5 4 3 2 1 0
R
OCIF1
0 0 0 0
PIFP2 PIFP1 PIFP0
W
Reset 0 0 0 0 0 0 0 0
Figure 2-23. Port P Interrupt Flag Register
Table 2-21. Port P Interrupt Flag Register Field Descriptions
Field Description
7
OCIF1
Over-Current Interrupt Flag register —
This flag asserts if an over-current condition is detected on PP0 (Section 2.4.6, “Over-Current Interrupt ”).
Writing a logic “1” to the corresponding bit field clears the flag.
1 PP0 Over-current event occurred
0 No PP0 over-current event occurred
2-0
PIFP2-0
See Section 2.3.3.7, “Port Interrupt Flag Register ”