Chapter 19 128 KB Flash Module (S12ZFTMRZ128K512V2)
MC9S12ZVM Family Reference Manual Rev. 1.3
Freescale Semiconductor
709
All bits in the FOPT register are readable but are not writable.
During the reset sequence, the FOPT register is loaded from the Flash nonvolatile byte in the Flash
configuration field at global address 0xFF_FE0E located in P-Flash memory (see
) as indicated
by reset condition F in
. If a double bit fault is detected while reading the P-Flash phrase
containing the Flash nonvolatile byte during the reset sequence, all bits in the FOPT register will be set.
19.3.2.12 Flash Reserved1 Register (FRSV1)
This Flash register is reserved for factory testing.
All bits in the FRSV1 register read 0 and are not writable.
19.3.2.13 Flash Common Command Object Registers (FCCOB)
The FCCOB is an array of six words. Byte wide reads and writes are allowed to the FCCOB registers.
Offset Module Base + 0x000A
7
6
5
4
3
2
1
0
R
NV[7:0]
W
Reset
F
(1)
1. Loaded from Flash configuration field, during reset sequence.
F
F
F
F
= Unimplemented or Reserved
Figure 19-16. Flash Option Register (FOPT)
Table 19-26. FOPT Field Descriptions
Field
Description
7–0
NV[7:0]
Nonvolatile Bits — The NV[7:0] bits are available as nonvolatile bits. Refer to the device user guide for proper
use of the NV bits.
Offset Module Base + 0x000B
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 19-17. Flash Reserved1 Register (FRSV1)
