Freescale Semiconductor MC9S12ZVM series, Reference Manual

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Appendix B CPMU Electrical Specifications (VREG, OSC, IRC, PLL)
MC9S12ZVM Family Reference Manual Rev. 1.3
760 Freescale Semiconductor
Figure B-1. Jitter Definitions
The relative deviation of t
nom
is at its maximum for one clock period, and decreases towards zero for larger
number of clock periods (N).
Defining the jitter as:
The following equation is a good fit for the maximum jitter:
Figure B-2. Maximum Bus Clock Jitter Approximation (N = number of bus cycles)
2 3 N-1 N 1
0
t
nom
t
max1
t
min1
t
maxN
t
minN
J N
( )
max 1
t
max
N
( )
N t
nom
⋅
----------------------- –
1
t
min
N
( )
N t
nom
⋅
----------------------- –
,
⎝ ⎠
⎜ ⎟
⎛ ⎞
=
J N
( )
j
1
N POSTDIV 1 +
( )
-------------------------------------------------- =
1 5 10 20 N
J(N)