Freescale Semiconductor MC9S12ZVM series, Reference Manual

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Chapter 13 Programmable Trigger Unit (PTUV2)
MC9S12ZVM Family Reference Manual Rev. 1.3
Freescale Semiconductor 480
13.4.2 Memory based trigger event list
The lists with the trigger values are located inside the global memory map. The location of the trigger lists
in the memory map is configured with registers PTUPTR and TGxLxIDX. If one of the TGs is enabled
then the PTUPTR register is locked. If the TG is enabled then the associated TGxLxIDX registers are
locked.
The trigger values inside the trigger list are 16 bit values. Each 16 bit value defines the delay between the
reload event and the trigger event in bus clock cycles. A delay value of 0x0000 will be interpreted as End
Of trigger List (EOL) symbol. The list must be sorted in ascending order. If a subsequent value is smaller
than the previous value or the loaded trigger value is smaller than the current counter value then the
TGxTEIF error indication is generated and the trigger generation of this list is stopped until the next reload
event. For more information about these error scenario see
Section 13.4.5.5, “Trigger Generator Timing
Error ”.
The module is not able to access memory area outside the 256 byte window starting at the memory address
defined by PTUPTR.
Figure 13-23. Global Memory map usage
Delay T0
Delay T1
Delay T2
0x0000
(EOL symbol)
unused
Delay T0
Delay T1
Delay T2
0x0000
(EOL symbol)
unused
Delay T0
Delay T1
0x0000
(EOL symbol)
unused
Delay T0
Delay T1
0x0000
(EOL symbol)
unused
0x00_0000
TG0L0IDX
Global Memory Map
TG0L1IDX
TG1L0IDX
TG1L1IDX
start address TG0 trigger event list 0
start address TG0 trigger event list 1
start address TG1 trigger event list 0
start address TG1 trigger event list 1
max accessible
memory area: 256 byte