Table 1-120. PIE Vector Table (continued)
Name
VECTOR ID
Address
Size (x16) Description
CPU
Priority
PIE Group
Priority
PIE Group 2 Vectors - MUXed into CPU INT2
INT2.1
40
0x0000 0D50
2
EPWM1_TZINT
(EPWM1)
6
1 (highest)
INT2.2
41
0x0000 0D52
2
EPWM2_TZINT
(EPWM2)
6
2
INT2.3
42
0x0000 0D54
2
EPWM3_TZINT
(EPWM3)
6
3
INT2.4
43
0x0000 0D56
2
EPWM4_TZINT
(EPWM4)
6
4
INT2.5
44
0x0000 0D58
2
EPWM5_TZINT
(EPWM5)
6
5
INT2.6
45
0x0000 0D5A
2
EPWM6_TZINT
(EPWM6)
6
6
INT2.7
46
0x0000 0D5C
2
EPWM7_TZINT
(EPWM7)
6
7
INT2.8
47
0x0000 0D5E
2
Reserved
6
8 (lowest)
PIE Group 3 Vectors - MUXed into CPU INT3
INT3.1
48
0x0000 0D60
2
EPWM1_INT
(EPWM1)
7
1 (highest)
INT3.2
49
0x0000 0D62
2
EPWM2_INT
(EPWM2)
7
2
INT3.3
50
0x0000 0D64
2
EPWM3_INT
(EPWM3)
7
3
INT3.4
51
0x0000 0D66
2
EPWM4_INT
(EPWM4)
7
4
INT3.5
52
0x0000 0D68
2
EPWM5_INT
(EPWM5)
7
5
INT3.6
53
0x0000 0D6A
2
EPWM6_INT
(EPWM6)
7
6
INT3.7
54
0x0000 0D6C
2
EPWM7_INT
(EPWM7)
7
7
INT3.8
55
0x0000 0D6E
2
EPWM8_INT
(EPWM8)
7
8 (lowest)
PIE Group 4 Vectors - MUXed into CPU INT4
INT4.1
56
0x0000 0D70
2
ECAP1_INT
(ECAP1)
8
1 (highest)
INT4.2
57
0x0000 0D72
2
ECAP2_INT
(ECAP2)
8
2
INT4.3
58
0x0000 0D74
2
ECAP3_INT
(ECAP3)
8
3
INT4.4
59
0x0000 0D76
2
Reserved
-
8
4
INT4.5
60
0x0000 0D78
2
Reserved
-
8
5
INT4.6
61
0x0000 0D7A
2
Reserved
-
8
6
INT4.7
62
0x0000 0D7C
2
Reserved
-
8
7
INT4.8
63
0x0000 0D7E
2
Reserved
-
8
8 (lowest)
PIE Group 5 Vectors - MUXed into CPU INT5
INT5.1
64
0x0000 0D80
2
EQEP1_INT
(EQEP1)
9
1 (highest)
INT5.2
65
0x0000 0D82
2
EQEP2_INT
(EQEP2)
9
2
INT5.3
66
0x0000 0D84
2
Reserved
9
3
INT5.4
67
0x0000 0D86
2
HRCAP3INT
HRCAP3
9
4
INT5.5
68
0x0000 0D88
2
HRCAP4INT
HRCAP4
9
5
INT5.6
69
0x0000 0D8A
2
Reserved
-
9
6
INT5.7
70
0x0000 0D8C
2
Reserved
-
9
7
INT5.8
71
0x0000 0D8E
2
USB0_INT (USB0)
-
9
8 (lowest)
PIE Group 6 Vectors - MUXed into CPU INT6
INT6.1
72
0x0000 0D90
2
SPIRXINTA
(SPI-A)
10
1 (highest)
INT6.2
73
0x0000 0D92
2
SPITXINTA
(SPI-A)
10
2
INT6.3
74
0x0000 0D94
2
SPIRXINTB
(SPI-B)
10
3
INT6.4
75
0x0000 0D96
2
SPITXINTB
(SPI-B)
10
4
INT6.5
76
0x0000 0D98
2
MRINTA
(McBSP-A)
10
5
INT6.6
77
0x0000 0D9A
2
MXINTA
(McBSP-A)
10
6
INT6.7
78
0x0000 0D9C
2
Reserved
-
10
7
INT6.8
79
0x0000 0D9E
2
Reserved
-
10
8 (lowest)
System Control and Interrupts
SPRUH18I – JANUARY 2011 – REVISED JUNE 2022
TMS320x2806x Microcontrollers
179
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Содержание TMS320 2806 Series
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