Stanford Research Systems SR785, Руководство по эксплуатации и программированию

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5-120 Status Reporting Commands
SR785 Dynamic Signal Analyzer
Status Reporting Commands
The Status Word definitions follow this section.
* CLS
The *CLS command clears all status registers. The enable registers are not
changed.
*
PSC (?) {i}
The *PSC command sets the value of the power-on status clear bit.
If i=1 the power-on status clear bit is set and all status registers and enable
registers are cleared on power up.
If i=0 the bit is cleared and all enable registers are stored at power down. The
status registers are cleared and the enable registers are restored to their stored
values on power up. This allows a service request to be generated at power up.
*
SRE (?) {i} {, j}
The *SRE i command sets the Serial Poll enable register to the decimal value i
(0-255). The *SRE i, j command sets bit i (0-7) to j (0 or 1).
The *SRE? command queries the value (0-255) of the serial poll enable register.
The *SRE? i command queries the value (0 or 1) of bit i (0-7).
When a bit becomes set in BOTH the Serial Poll status word AND the Serial
Poll enable register, an SRQ (GPIB service request) is generated. The SRQ is
cleared by performing a serial poll. The bit in the Serial Poll status word which
caused the SRQ must be cleared before this bit can cause another SRQ. To clear
this bit, the condition which causes it to be set in the Serial Poll status word
needs to be cleared. For the INST, DISP, INPT, IERR or ESB bits, this is
accomplished by clearing the enabled status bits in the Instrument, Display,
Input, Error or Standard Event status words (by reading them).
*
STB ? {i}
The *STB? command queries the value of the Serial Poll status word. The value
is returned as a decimal number from 0 to 255. The *STB? i command queries
the value (0 or 1) of bit i (0-7).
The value of bit 6 (SRQ) when read using *STB? returns 1 if a bit is set in
BOTH the Serial Poll status word AND the Serial Poll enable register. This is
independent of serial polling and SRQ’s. Bit 6 is the SRQ bit only when serial
polled.
*STB? has no effect on the value of the Serial Poll status word. To clear a bit in
the Serial Poll status, the condition which causes it to be set must be cleared. For
the INST, DISP, INPT, IERR or ESB bits, this is accomplished by clearing the
enabled status bits in the Instrument, Display, Input, Error or Standard Event
status words (by reading them).