DocID018909 Rev 11
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RM0090
Power controller (PWR)
149
5.6
PWR register map
The following table summarizes the PWR registers.
for the register boundary addresses.
Table 31. PWR - register map and reset values for STM32F405xx/07xx and STM32F415xx/17xx
Offset
Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x000
PWR_CR
Reserved
VO
S
Reserved
FPD
S
DBP
PLS[2:0]
PVDE
CS
BF
CWUF
PDDS
LP
DS
Reset value
1
0
0
0
0
0
0
0
0
0
0
0x004
PWR_CSR
Reserved
V
O
SRDY
Reserved
BR
E
EW
U
P
Reserved
BR
R
PVDO
SBF
WUF
Reset value
0
0
0
0
0
0
0
Table 32. PWR - register map and reset values for STM32F42xxx and STM32F43xxx
Offset
Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x000
PWR_CR
Reserved
UDEN[1:0
]
ODSWE
N
ODEN
VO
S[
1:0
]
ADCDC1
Reserved
MRUDS
LPUDS
FPDS
DB
P
PLS[2:0]
PV
DE
CSBF
CWUF
PD
D
S
LPDS
Reset value
1
1
1
1
1
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0x004
PWR_CSR
Reserved
UD
RDY
[1:0]
ODSWRDY
ODRDY
Re
se
rved
V
O
SRDY
Reserved
BRE
EWUP
Reserved
BR
R
PV
D
O
SBF
WUF
Reset value
0
0
0
0
0
0
0
0
0
0
0