DocID018909 Rev 11
507/1731
RM0090
LCD-TFT Controller (LTDC)
511
Example:
•
A frame buffer having the format RGB565 (2 bytes per pixel) and a width of 256 pixels
(total number of bytes per line is 256x2=512 bytes), where pitch = line length requires a
value of 0x02000203 to be written into this register.
•
A frame buffer having the format RGB888 (3 bytes per pixel) and a width of 320 pixels
(total number of bytes per line is 320x3=960), where pitch = line length requires a value
of 0x03C003C3 to be written into this register.
16.7.24 LTDC Layerx ColorFrame Buffer Line Number Register
(LTDC_LxCFBLNR) (where x=1..2)
This register defines the number of lines in the color frame buffer.
Address offset: 0xB4 + 0x80 x (
Layerx
-1),
Layerx
= 1 or 2
Reset value: 0x0000 0000
Note:
The number of lines and line length settings define how much data is fetched per frame for
every layer. If it is configured to less bytes than required, a FIFO underrun interrupt will be
generated if enabled.
The start address and pitch settings on the other hand define the correct start of every line in
memory.
Bits 31:29 Reserved, must be kept at reset valuer
Bits 28:16
CFBP[12:0]
: Color Frame Buffer Pitch in bytes
These bits define the pitch which is the increment from the start of one line of pixels to the
start of the next line in bytes.
Bits 15:13 Reserved, must be kept at reset value
Bits 12:0
CFBLL[12:0]
: Color Frame Buffer Line Length
These bits define the length of one line of pixels in bytes + 3.
The line length is computed as follows: Active high width x number of bytes per pixel + 3.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
CFBLNBR[10:0]
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
Bits 31:11 Reserved, must be kept at reset value
Bits 10:0
CFBLNBR[10:0]
: Frame Buffer Line Number
These bits define the number of lines in the frame buffer which corresponds to the Active
high width.
