STMicroelectronics STM32F405, Reference Manual, Page: 1370 / 1731

USB on-the-go high-speed (OTG_HS) RM0090
1370/1731 DocID018909 Rev 11
35.2.1 General features
The OTG_HS interface main features are the following:
•
It is USB-IF certified in compliance with the Universal Serial Bus Revision 2.0
Specification
•
It supports 3 PHY interfaces
–
An on-chip full-speed PHY
– An I
2
C Interface for external full-speed I
2
C PHY
– An ULPI interface for external high-speed PHY.
•
It supports the host negotiation protocol (HNP) and the session request protocol (SRP)
•
It allows the host to turn V
BUS
off to save power in OTG applications, with no need for
external components
•
It allows to monitor V
BUS
levels using internal comparators
•
It supports dynamic host-peripheral role switching
•
It is software-configurable to operate as:
–
An SRP-capable USB HS/FS peripheral (B-device)
– An SRP-capable USB HS/FS/low-speed host (A-device)
– An USB OTG FS dual-role device
•
It supports HS/FS SOFs as well as low-speed (LS) keep-alive tokens with:
–
SOF pulse PAD output capability
– SOF pulse internal connection to timer 2 (TIM2)
– Configurable framing period
– Configurable end-of-frame interrupt
•
It embeds an internal DMA with shareholding support and software selectable AHB
burst type in DMA mode
•
It has power saving features such as system clock stop during USB suspend, switching
off of the digital core internal clock domains, PHY and DFIFO power management
•
It features a dedicated 4-Kbyte data RAM with advanced FIFO management:
–
The memory partition can be configured into different FIFOs to allow flexible and
efficient use of RAM
– Each FIFO can contain multiple packets
– Memory allocation is performed dynamically
– The FIFO size can be configured to values that are not powers of 2 to allow the
use of contiguous memory locations
•
It ensures a maximum USB bandwidth of up to one frame without application
intervention