Reset and clock control for STM32F42xxx and STM32F43xxx (RCC)
RM0090
176/1731
DocID018909 Rev 11
Bit 18
USART3RST:
USART3 reset
Set and cleared by software.
0: does not reset USART3
1: resets USART3
Bit 17
USART2RST:
USART2 reset
Set and cleared by software.
0: does not reset USART2
1: resets USART2
Bit 16 Reserved, must be kept at reset value.
Bit 15
SPI3RST:
SPI3 reset
Set and cleared by software.
0: does not reset SPI3
1: resets SPI3
Bit 14
SPI2RST:
SPI2 reset
Set and cleared by software.
0: does not reset SPI2
1: resets SPI2
Bits 13:12 Reserved, must be kept at reset value.
Bit 11
WWDGRST:
Window watchdog reset
Set and cleared by software.
0: does not reset the window watchdog
1: resets the window watchdog
Bits 10:9 Reserved, must be kept at reset value.
Bit 8
TIM14RST:
TIM14 reset
Set and cleared by software.
0: does not reset TIM14
1: resets TIM14
Bit 7
TIM13RST:
TIM13 reset
Set and cleared by software.
0: does not reset TIM13
1: resets TIM13
Bit 6
TIM12RST:
TIM12 reset
Set and cleared by software.
0: does not reset TIM12
1: resets TIM12
Bit 5
TIM7RST:
TIM7 reset
Set and cleared by software.
0: does not reset TIM7
1: resets TIM7
Bit 4
TIM6RST:
TIM6 reset
Set and cleared by software.
0: does not reset TIM6
1: resets TIM6